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Education
- Ph.D. George Washington University, Washington, D.C., 2022
- M.Sc. Worcester Polytechnic Institute, Worcester, MA, 2015
- B.Sc. Peking University, Beijing, China, 2013
Research
- Computer Architecture
- Interconnection Networks
- Machine-Learning-enabled Computer Architecture Designs
- Graph Neural Network Accelerators
Selected Publications
- Ke Wang, Hao Zheng, Yuan Li, Jiajun Li, and Ahmed Louri, “AGAPE: Anomaly Detection with Generative Adversarial Network for Improved Performance, Energy, and Security in Manycore Systems,” in Proceedings of Design, Automation, & Test in Europe Conference & Exhibition, Antwerp, Belgium, March 14-15, 2022.
- Jiajun Li, Hao Zheng, Ke Wang, and Ahmed Louri, “SGCNAX” A Scalable Graph Convolutional Neural Network Accelerator with Workload Balancing.” IEEE Transactions on Parallel & Distributed Systems 01 (2021): 1-1, 2021.
- Hao Zheng, Ke Wang, and Ahmed Louri. “Adapt-NoC: A flexible network-on-chip design for heterogeneous manycore architectures.” In 2021 IEEE International Symposium on Hight-Performance Computer Architecture (HPCA), pp. 723-735. IEEE, 2021
- Ke Wang and Ahmed Louri, “CURE: A High-Performance, Low-Power, and Reliable Network-on-Chip Design Using Reinforcement Learning,” In IEEE Transactions on Parallel and Distributed Systems, vol. 31, no. 9, pp. 2125-2138, 1 Sept. 2020.
- Ke Wang, Ahmed Louri, Avinash Karanth, and Razvan Bunescu. “IntelliNoC: A holistic design framework for energy-efficient and reliable on-chip communicaiton for manycores.” In 2019 ACM/IEEE 46th Annual International SYmposium on Computer Architecture (ISCA), pp. 1-12. IEEE, 2019.
